Jeongwoo Heo

Delivering Silicon Systems Through AI Disruption, Part 1: Writing the Score

semiconductor

Delivering Silicon Systems Through AI Disruption, Part 1: Writing the Score

Source: https://semiwiki.com/semiconductor-services/flow-accel/374405-delivering-silicon-systems-through-ai-disruption-part-1-writing-the-score/ Score: the written music for an orchestra, with every section’s part laid out on the same page so they play together. In this article, it’s your designed workflows. 총보(Score): 오케스트라를 위한 악보로, 모든 파트의 악보가 한 페이지에 정렬되어 함께 연주할

By Jeongwoo Heo
A Migration Feasibility Study Can Turn an Uncertain Re-Design into a Measurable Engineering Project

semiconductor

A Migration Feasibility Study Can Turn an Uncertain Re-Design into a Measurable Engineering Project

Source: https://semiwiki.com/semiconductor-services/in2fab/374736-migration-feasibility-study/ Moving semiconductor IP to a new process technology is often treated as a redesign problem. For analog and mixed-signal designs, however, starting again from the schematic can overlook an asset: the engineering knowledge embedded in the existing physical layout. 반도체 IP를 새로운 공정

By Jeongwoo Heo
Teradyne Unveils Magnum E2 for the Next Wave of AI Memory

semiconductor

Teradyne Unveils Magnum E2 for the Next Wave of AI Memory

Source: https://semiwiki.com/semiconductor-manufacturers/teradyne/374603-teradyne-unveils-magnum-e2-for-the-next-wave-of-ai-memory/ Teradyne has announced Magnum E2, a memory test system designed to address the increasingly demanding interfaces used in artificial intelligence and high performance computing. The platform targets advanced DRAM and flash technologies, including LPDDR6, DDR6, GDDR7, and NAND flash, while combining engineering and

By Jeongwoo Heo
VSORA’s Sandra Rivera on the Inference Era: Demand Is Real, But Not Everyone Survives

semiconductor

VSORA’s Sandra Rivera on the Inference Era: Demand Is Real, But Not Everyone Survives

Source: https://semiwiki.com/semiconductor-manufacturers/vsora/374585-vsoras-sandra-rivera-on-the-inference-era-demand-is-real-but-not-everyone-survives/ Sandra Rivera, Chair of VSORA, joined Bloomberg’s The Close in July for an interview on the current state of AI. What follows is a summary of that conversation. VSORA의 의장인 산드라 리베라(Sandra Rivera)는 지난 7월 블룸버그의 ‘더 클로즈(The Close)

By Jeongwoo Heo
Intel’s Open Software Blueprint: Why Production AI Needs More Than GPUs

semiconductor

Intel’s Open Software Blueprint: Why Production AI Needs More Than GPUs

Source: https://semiwiki.com/semiconductor-manufacturers/intel/374536-intels-open-software-blueprint-why-production-ai-needs-more-than-gpus/ Intel’s strategic argument about enterprise AI is that the value of a model depends on the system that surrounds it. In an article by executives Bill Pearson and Anil Nanduri, the company positions open software as the connective tissue linking CPUs, GPUs,

By Jeongwoo Heo
Chips&Media targets AI memory bottlenecks with new compression IP

semiconductor

Chips&Media targets AI memory bottlenecks with new compression IP

Source: https://semiwiki.com/ip/chipsmedia/374498-chipsmedia-targets-ai-memory-bottlenecks-with-new-compression-ip/ Chips&Media has announced a data compression technology aimed at one of the constraints in artificial intelligence hardware: moving data fast enough to keep processors busy. The South Korean semiconductor intellectual property supplier says its new Feature Map Compression IP marks an

By Jeongwoo Heo
Overcoming the Edge AI Power Wall with Low-Voltage Foundation IP

semiconductor

Overcoming the Edge AI Power Wall with Low-Voltage Foundation IP

Source: https://semiwiki.com/artificial-intelligence/374757-overcoming-the-edge-ai-power-wall-with-low-voltage-foundation-ip/ As artificial intelligence (AI) workloads migrate to endpoint hardware, edge AI devices face immense pressure to deliver real-time inference within highly restrictive power and thermal envelopes. Traditional silicon scaling no longer yields the power-density returns it once did. To compensate, engineering teams are turning

By Jeongwoo Heo
ChipAgents and NVIDIA Put Autonomous Chip Design to the Test

semiconductor

ChipAgents and NVIDIA Put Autonomous Chip Design to the Test

Source: https://semiwiki.com/eda/374909-chipagents-and-nvidia-put-autonomous-chip-design-to-the-test/ ChipAgents has introduced Build-A-Chip-Bench, a benchmark developed with NVIDIA to evaluate whether AI agents can complete digital chip design tasks from specification through physical implementation. The initiative measures progress beyond generating hardware code, asking whether autonomous systems can deliver verified layouts while satisfying interconnected

By Jeongwoo Heo